The fabrication of semiconductor devices involves forming electronic components in and on semiconductor substrates, such as silicon wafers. These electronic components may include one or more conductive layers, one or more insulation layers, and doped regions formed by implanting various dopants into portions of a semiconductor substrate to achieve specific electrical properties. Semiconductor devices include transistors, resistors, capacitors, and the like, with intermediate and overlying metallization patterns at varying levels, separated by dielectric materials, which interconnect the semiconductor devices to form integrated circuits.
Field-effect transistors (FETs), such as planar metal-oxide-semiconductor FETs (MOSFETs) and 3-dimensional FinFETs, are semiconductor devices. Generally, a FET has three terminals: a gate structure (or gate stack), a source region, and a drain region. The gate stack comprises a gate electrode formed of conductive material, and a metal-oxide insulating layer disposed between the gate electrode and the body of the transistor. By varying the voltage applied to the gate electrode, the gate stack controls a flow of charge carriers through a channel beneath the gate stack and between the source and the drain regions, thereby turning the transistor on or off. The source region is a doped region in the semiconductor device from which majority charge carriers are flowing into the channel portion. The drain region is a doped region in the semiconductor device, located at the end of the channel portion, to which charge carriers are flowing from the source region via the channel portion.
Gate stacks may include a spacer layer, formed as a sidewall of the gate stack. The spacer layer electrically isolates the gate electrode from the source and drain contacts, protects the gate stack from physical degradation during fabrication, and also protects the gate electrode metal from oxygen and moisture. The spacer layer must generally be resistant to wet etches used in the fabrication processes and has to be fabricated at temperatures compatible with other materials of the semiconductor device. Typically, the spacer layer is formed of silicon nitride (Si3N4). Silicon nitride has good wet etch selectivity when deposited at high temperatures (e.g., approximately 700 to 850 degrees Celsius) used in pure-silicon fabrication techniques. However, when silicon nitride is deposited at the lower temperatures required for next-generation silicon technology, silicon nitride typically exhibits poor etch selectivity and, therefore, hinders fabrication. For example, etch selectivity of silicon nitride is poor when deposited at temperatures compatible with silicon germanium (SiGe) or germanium (Ge) devices (e.g., approximately 650 degrees Celsius or less), and is even worse when deposited at temperatures compatible with III-V devices (e.g., approximately 600 degrees Celsius or less).